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A design for small time-delay control circuit for DPWM- POL
http://hdl.handle.net/10069/23213
http://hdl.handle.net/10069/2321384e4dfd8-81f2-4581-8b01-e620f3092e82
名前 / ファイル | ライセンス | アクション |
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APEC_2010_5433490.pdf (1.3 MB)
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Item type | 会議発表論文 / Conference Paper(1) | |||||
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公開日 | 2010-06-22 | |||||
タイトル | ||||||
タイトル | A design for small time-delay control circuit for DPWM- POL | |||||
言語 | ||||||
言語 | eng | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_5794 | |||||
資源タイプ | conference paper | |||||
著者 |
Ishizuka, Yoichi
× Ishizuka, Yoichi× Yamada, Yusuke× Hirose, Fumitoshi× Nishi, Mariko× Matsuo, Hirofumi |
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抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | Digital-controlled switching mode power supplies (SMPS) are popular in the fields of relatively large power supply system. The digital controller is consisted of DSPs or microprocessors performing with software. By contrast, such as on-board SMPSs, adapting digital controller isn't still popular because of its cost or response characteristics even if the controllers are constructed by FPGA or custom LSI which is hardwarelogic base. This paper will discuss about the proposed hardware logic type digital controller for on-board SMPS, which is very simple and unique design. And, accuracy improved output voltage detection method for the proposed digital controller is proposed. The some experiments are done. And the results show the validity of the proposed circuits. | |||||
内容記述 | ||||||
内容記述タイプ | Other | |||||
内容記述 | 2010 IEEE Applied Power Electronics Conference and Exposition - APEC 2010 : Palm Springs, CA, USA, 2010.02.21-2010.02.25 | |||||
書誌情報 |
2010 Twenty-Fifth Annual IEEE Applied Power Electronics Conference and Exposition (APEC) p. 1879-1884, 発行日 2010-02 |
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ISBN | ||||||
識別子タイプ | ISBN | |||||
関連識別子 | 978-1-4244-4782-4 | |||||
DOI | ||||||
関連タイプ | isIdenticalTo | |||||
識別子タイプ | DOI | |||||
関連識別子 | 10.1109/APEC.2010.5433490 | |||||
権利 | ||||||
権利情報 | ©2010 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. | |||||
著者版フラグ | ||||||
出版タイプ | VoR | |||||
出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||
出版者 | ||||||
出版者 | IEEE | |||||
引用 | ||||||
内容記述タイプ | Other | |||||
内容記述 | 2010 Twenty-Fifth Annual IEEE Applied Power Electronics Conference and Exposition (APEC), pp.1879-1884 |