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ハードウエア記述言語による電圧形インバータ用PWM発生回の開発
http://hdl.handle.net/10069/14979
http://hdl.handle.net/10069/1497907d1cbb6-d7b1-48e4-8c29-18bf2e274e9b
名前 / ファイル | ライセンス | アクション |
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KJ00004723880.pdf (408.7 kB)
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Item type | 紀要論文 / Departmental Bulletin Paper(1) | |||||
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公開日 | 2008-03-05 | |||||
タイトル | ||||||
タイトル | ハードウエア記述言語による電圧形インバータ用PWM発生回の開発 | |||||
言語 | ||||||
言語 | jpn | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
資源タイプ | departmental bulletin paper | |||||
著者 |
泉, 勝弘
× 泉, 勝弘× 古川, 雄一朗× 辻, 峰男× 小山, 純× 山田, 英二 |
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著者別名 | ||||||
姓名 | Izumi, Katsuhiro | |||||
著者別名 | ||||||
姓名 | Furukawa, Yuichirou | |||||
著者別名 | ||||||
姓名 | Tsuji, Mineo | |||||
著者別名 | ||||||
姓名 | Oyama, Jun | |||||
著者別名 | ||||||
姓名 | Yamada, Eiji | |||||
その他のタイトル | ||||||
その他のタイトル | Development of PWM Generator for Voltage-Type Inverter using Hardware Description Language | |||||
抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | This paper presents a compact and high confident PWM generator with field programmable gate array (FPGA) to control high speed switching devices. FPGAs which have a large scale and big capacity are designed using hardware description language (HDL) in the field. Method of PWM pattern generation is asynchronous-type PWM, because hardware and software of it becomes simple. This FPGA contains many data latches, four counters and many logic. PWM generator with FPGA inputs the duty data and dead time one from a host processor and outputs the gate signal to the power device. We generate PWM patterns with a double edge modulation, and provide a variable dead time for prevent of upper and lower arm short-circuit. Experimental results are shown to verify functions of PWM generator with FPGA. | |||||
書誌情報 |
長崎大学工学部研究報告 巻 26, 号 47, p. 191-195, 発行日 1996-07 |
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ISSN | ||||||
収録物識別子タイプ | ISSN | |||||
収録物識別子 | 02860902 | |||||
書誌レコードID | ||||||
収録物識別子タイプ | NCID | |||||
収録物識別子 | AN00178418 | |||||
sortkey | ||||||
P00191-P00195 | ||||||
引用 | ||||||
内容記述タイプ | Other | |||||
内容記述 | 長崎大学工学部研究報告 Vol.26(47) p. 191-195, 1996 |