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Deep pipelined one-chip FPGA implementation of a real-time image-based human detection algorithm
http://hdl.handle.net/10069/29887
http://hdl.handle.net/10069/2988735d49399-e969-42fe-ada5-0c83667966db
名前 / ファイル | ライセンス | アクション |
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FPT2011_6132679.pdf (1.9 MB)
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Item type | 会議発表論文 / Conference Paper(1) | |||||
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公開日 | 2012-11-29 | |||||
タイトル | ||||||
タイトル | Deep pipelined one-chip FPGA implementation of a real-time image-based human detection algorithm | |||||
言語 | ||||||
言語 | eng | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | Detection rates | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | Empirical evaluations | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | External memory | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | False positive rates | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | FPGA implementations | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | Human detection | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | Image-based | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | Maximum through-put | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | Off-line training | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | Software implementation | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_5794 | |||||
資源タイプ | conference paper | |||||
著者 |
Negi, Kazuhiro
× Negi, Kazuhiro× Dohi, Keisuke× Shibata, Yuichiro× Oguri, Kiyoshi |
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抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | In this paper, deep pipelined FPGA implementation of a real-time image-based human detection algorithm is presented. By using binary patterned HOG features, AdaBoost classifiers generated by offline training, and some approximation arithmetic strategies, our architecture can be efficiently fitted on a low-end FPGA without any external memory modules. Empirical evaluation reveals that our system achieves 62.5 fps of the detection throughput, showing 96.6% and 20.7% of the detection rate and the false positive rate, respectively. Moreover, if a highspeed camera device is available, the maximum throughput of 112 fps is expected to be accomplished, which is 7.5 times faster than software implementation. | |||||
書誌情報 |
2011 International Conference on Field-Programmable Technology, FPT 2011 p. 6132679, 発行日 2011-12 |
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DOI | ||||||
関連タイプ | isVersionOf | |||||
識別子タイプ | DOI | |||||
関連識別子 | 10.1109/FPT.2011.6132679 | |||||
権利 | ||||||
権利情報 | © 2011 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. | |||||
著者版フラグ | ||||||
出版タイプ | AM | |||||
出版タイプResource | http://purl.org/coar/version/c_ab4af688f83e57aa | |||||
出版者 | ||||||
出版者 | IEEE | |||||
引用 | ||||||
内容記述タイプ | Other | |||||
内容記述 | 2011 International Conference on Field-Programmable Technology, FPT 2011, Article number6132679; 2011 |