{"created":"2023-05-15T16:41:59.941279+00:00","id":16835,"links":{},"metadata":{"_buckets":{"deposit":"1af3ed14-78be-41d3-a90d-be512b1098e4"},"_deposit":{"created_by":2,"id":"16835","owners":[2],"pid":{"revision_id":0,"type":"depid","value":"16835"},"status":"published"},"_oai":{"id":"oai:nagasaki-u.repo.nii.ac.jp:00016835","sets":["14:65"]},"author_link":["65205","65204","65202","65203","65201"],"item_9_biblio_info_6":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2009-07","bibliographicIssueDateType":"Issued"},"bibliographicPageEnd":"438","bibliographicPageStart":"433","bibliographic_titles":[{"bibliographic_title":"2009 NASA/ESA Conference on Adaptive Hardware and Systems"}]}]},"item_9_description_4":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"In this paper, we present a comparison study about implementatons of phase correlation function using GPUs, ASIC and FPGAs. The Phase Only Correlation(POC) method demonstrates high robustness and subpixel accuracy in the pattern matching and the image registration. However, there is a disadvantage in computational speed because of the calculation of 2D-FFT etc. We have proposed a novel approach to accelerate POC method using GPU to solve the calculation cost problem. Using our GPU-based POC implementation, each POC calculation can be done within 2.36 milli seconds using a GPU for 256 × 256 pixels, on the other hand, within 27.15 milli seconds for Cinderella II 100 MHz (ASIC), 4.51 milli seconds for Xilinx XC2V6000 66 MHz (FPGA). These results show that, for POC calculation and FFT-based computations in general, GPUs are very competitive in terms of performance and performance figures, whereas FPGAs are competitive in terms of performance per frequency figures.","subitem_description_type":"Abstract"}]},"item_9_description_5":{"attribute_name":"内容記述","attribute_value_mlt":[{"subitem_description":"2009 NASA/ESA Conference on Adaptive Hardware and Systems (AHS) : San Francisco, CA, USA, 2009.07.29-2009.08.1","subitem_description_type":"Other"}]},"item_9_description_63":{"attribute_name":"引用","attribute_value_mlt":[{"subitem_description":"2009 NASA/ESA Conference on Adaptive Hardware and Systems, pp.433-438; 2009","subitem_description_type":"Other"}]},"item_9_publisher_33":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"IEEE"}]},"item_9_relation_12":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type":"isIdenticalTo","subitem_relation_type_id":{"subitem_relation_type_id_text":"10.1109/AHS.2009.53","subitem_relation_type_select":"DOI"}}]},"item_9_relation_9":{"attribute_name":"ISBN","attribute_value_mlt":[{"subitem_relation_type_id":{"subitem_relation_type_id_text":"978-0-7695-3714-6","subitem_relation_type_select":"ISBN"}}]},"item_9_rights_13":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"c 2009 IEEE.  Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE."}]},"item_9_version_type_16":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Matsuo, Kentaro"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hamada, Tsuyoshi"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Miyoshi, Masayuki"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Shibata, Yuichiro"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Oguri, Kiyoshi"}],"nameIdentifiers":[{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2020-12-23"}],"displaytype":"detail","filename":"AHS2009_433.pdf","filesize":[{"value":"391.6 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"AHS2009_433.pdf","url":"https://nagasaki-u.repo.nii.ac.jp/record/16835/files/AHS2009_433.pdf"},"version_id":"911cefba-9fd2-4b49-8437-579152cf7b92"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"conference paper","resourceuri":"http://purl.org/coar/resource_type/c_5794"}]},"item_title":"Accelerating Phase Correlation Functions Using GPU and FPGA","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Accelerating Phase Correlation Functions Using GPU and FPGA"}]},"item_type_id":"9","owner":"2","path":["65"],"pubdate":{"attribute_name":"公開日","attribute_value":"2010-01-20"},"publish_date":"2010-01-20","publish_status":"0","recid":"16835","relation_version_is_last":true,"title":["Accelerating Phase Correlation Functions Using GPU and FPGA"],"weko_creator_id":"2","weko_shared_id":-1},"updated":"2023-05-17T20:35:47.771741+00:00"}