{"created":"2023-05-15T16:43:35.983191+00:00","id":19001,"links":{},"metadata":{"_buckets":{"deposit":"8109e190-ad78-4fff-a253-eccc4e2c5382"},"_deposit":{"created_by":2,"id":"19001","owners":[2],"pid":{"revision_id":0,"type":"depid","value":"19001"},"status":"published"},"_oai":{"id":"oai:nagasaki-u.repo.nii.ac.jp:00019001","sets":["14:65"]},"author_link":["77981","77979","77980","77982"],"item_9_biblio_info_6":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2008-09","bibliographicIssueDateType":"Issued"},"bibliographicPageEnd":"399","bibliographicPageStart":"393","bibliographic_titles":[{"bibliographic_title":"2008 13th International Power Electronics and Motion Control Conference (EPE-PEMC 2008)"}]}]},"item_9_description_4":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"Recently, the distributed power system is mainly used for the power supply system which requires the low-voltage / high-current output. The distributed power system consists of bus converter and POL. The most important factor is the system stability in bus architecture design. The overlap between the output impedance of bus converter and input impedance of POL causes system instability, and it has been an actual problem. Increasing the bus capacitor, system stability can be reduced easily. However, due to the limited space on the system board, increasing of bus capacitors is impractical. The urgent solution of the issue is desired strongly. This paper presents the output impedance design for on-board distributed power system by means of three control schemes of bus converter. The output impedance peak of the bus converter and the input impedance of the POL are analyzed, and it is conformed by experimentally for stability criterion. Furthermore, the optimal intermediate bus capacitance design for system stability is proposed.","subitem_description_type":"Abstract"}]},"item_9_description_5":{"attribute_name":"内容記述","attribute_value_mlt":[{"subitem_description":"2008 13th International Power Electronics and Motion Control Conference, EPE-PEMC 2008; Poznan; 1 September 2008 through 3 September 2008","subitem_description_type":"Other"}]},"item_9_description_63":{"attribute_name":"引用","attribute_value_mlt":[{"subitem_description":"EPE-PEMC 2008, pp.393-399","subitem_description_type":"Other"}]},"item_9_publisher_33":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"Institute of Electrical and Electronics Engineers"}]},"item_9_relation_12":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type":"isIdenticalTo","subitem_relation_type_id":{"subitem_relation_type_id_text":"10.1109/EPEPEMC.2008.4635297","subitem_relation_type_select":"DOI"}}]},"item_9_relation_9":{"attribute_name":"ISBN","attribute_value_mlt":[{"subitem_relation_type_id":{"subitem_relation_type_id_text":"978-1-4244-1741-4","subitem_relation_type_select":"ISBN"}}]},"item_9_rights_13":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"(c)2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE."}]},"item_9_version_type_16":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Abe, Seiya"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Hirokawa, Masahiko"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Shoyama, Masahito"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Ninomiya, Tamotsu"}],"nameIdentifiers":[{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2020-12-23"}],"displaytype":"detail","filename":"EPE-PEMC2008_393.pdf","filesize":[{"value":"284.6 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"EPE-PEMC2008_393.pdf","url":"https://nagasaki-u.repo.nii.ac.jp/record/19001/files/EPE-PEMC2008_393.pdf"},"version_id":"d66f7f71-942a-4ff2-ad1b-1fe8a51e870d"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"conference paper","resourceuri":"http://purl.org/coar/resource_type/c_5794"}]},"item_title":"Optimal bus capacitance design for system stability in on-board distributed power architecture","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Optimal bus capacitance design for system stability in on-board distributed power architecture"}]},"item_type_id":"9","owner":"2","path":["65"],"pubdate":{"attribute_name":"公開日","attribute_value":"2008-12-17"},"publish_date":"2008-12-17","publish_status":"0","recid":"19001","relation_version_is_last":true,"title":["Optimal bus capacitance design for system stability in on-board distributed power architecture"],"weko_creator_id":"2","weko_shared_id":-1},"updated":"2023-05-16T03:35:39.662514+00:00"}