@inproceedings{oai:nagasaki-u.repo.nii.ac.jp:00009292,
 author = {Negi, Kazuhiro and Dohi, Keisuke and Shibata, Yuichiro and Oguri, Kiyoshi},
 book = {2011 International Conference on Field-Programmable Technology, FPT 2011},
 month = {Dec},
 note = {In this paper, deep pipelined FPGA implementation of a real-time image-based human detection algorithm is presented. By using binary patterned HOG features, AdaBoost classifiers generated by offline training, and some approximation arithmetic strategies, our architecture can be efficiently fitted on a low-end FPGA without any external memory modules. Empirical evaluation reveals that our system achieves 62.5 fps of the detection throughput, showing 96.6% and 20.7% of the detection rate and the false positive rate, respectively. Moreover, if a highspeed camera device is available, the maximum throughput of 112 fps is expected to be accomplished, which is 7.5 times faster than software implementation., 2011 International Conference on Field-Programmable Technology, FPT 2011, Article number6132679; 2011},
 publisher = {IEEE},
 title = {Deep pipelined one-chip FPGA implementation of a real-time image-based human detection algorithm},
 year = {2011}
}