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FPGA implementation of a data-driven stochastic biochemical simulator with the next reaction method
http://hdl.handle.net/10069/19233
http://hdl.handle.net/10069/1923355573117-5f33-420d-9856-e0d0db27907c
| 名前 / ファイル | ライセンス | アクション |
|---|---|---|
FPL2007_254.pdf (223.2 kB)
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| Item type | 学術雑誌論文 / Journal Article(1) | |||||
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| 公開日 | 2008-09-03 | |||||
| タイトル | ||||||
| タイトル | FPGA implementation of a data-driven stochastic biochemical simulator with the next reaction method | |||||
| 言語 | ||||||
| 言語 | eng | |||||
| 資源タイプ | ||||||
| 資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
| 資源タイプ | journal article | |||||
| 著者 |
Yoshimi, Masato
× Yoshimi, Masato× Iwaoka, Yow× Nishikawa, Yuri× Kojima, Toshinori× Osana, Yasunori× Funahashi, Akira× Hiroi, Noriko× Shibata, Yuichiro× Iwanaga, Naoki× Yamada, Hideki× Kitano, Hiroaki× Amano, Hideharu |
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| 抄録 | ||||||
| 内容記述タイプ | Abstract | |||||
| 内容記述 | This paper introduces a scalable FPGA implementation of a stochastic simulation algorithm (SSA) called the Next Reaction Method. There are some hardware approaches of SSAs that obtained high-through put on reconfigurable devices such as FPGAs, but these works lacked in scalability. The design of this work can accommodate to the increasing size of target biochemical models, or to make use of increasing capacity of FPGAs. Interconnection network between arithmetic circuits and multiple simulation circuits aims to perform a data-driven multi-threading simulation. Approximately 8 times speedup was obtained compared to an execution on Xeon 2.80GHz. | |||||
| 内容記述 | ||||||
| 内容記述タイプ | Other | |||||
| 内容記述 | 2007 International Conference on Field Programmable Logic and Applications : Amsterdam, Netherlands, 2007.08.27-2007.08.29 | |||||
| 書誌情報 |
Proceedings - 2007 International Conference on Field Programmable Logic and Applications p. 254-259, 発行日 2007-08 |
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| 出版者 | ||||||
| 出版者 | Institute of Electrical and Electronics Engineers | |||||
| ISBN | ||||||
| 識別子タイプ | ISBN | |||||
| 関連識別子 | 9781424410606 | |||||
| 書誌レコードID | ||||||
| 識別子タイプ | NCID | |||||
| 関連識別子 | BA84889732 | |||||
| DOI | ||||||
| 関連タイプ | isIdenticalTo | |||||
| 識別子タイプ | DOI | |||||
| 関連識別子 | 10.1109/FPL.2007.4380656 | |||||
| 権利 | ||||||
| 権利情報 | (c)2007 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. | |||||
| 著者版フラグ | ||||||
| 出版タイプ | VoR | |||||
| 出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||
| 引用 | ||||||
| 内容記述タイプ | Other | |||||
| 内容記述 | 2007 International Conference on Field Programmable Logic and Applications, pp.254-259 | |||||
