| アイテムタイプ |
会議発表論文 / Conference Paper(1) |
| 公開日 |
2010-06-25 |
| タイトル |
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|
タイトル |
A time-delay suppression technique for DPWM control circuit |
| 言語 |
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言語 |
eng |
| 資源タイプ |
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資源タイプ識別子 |
http://purl.org/coar/resource_type/c_5794 |
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資源タイプ |
conference paper |
| 著者 |
Ishizuka, Yoichi
Hirose, Fumitoshi
Yamada, Yusuke
Matsuo, Hirofumi
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| 抄録 |
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内容記述タイプ |
Abstract |
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内容記述 |
A proposed design of a low-cost digital pulse width modulation (DPWM) control circuit for non-isolated DC-DC converter without A/D converter is described. Also, propsed real-time PID control technique for DPWM is described. Some experimental results and simulation results are revealed the proposed circuit and scheme. The purpose of this research is striking a balance between minimizing cost increase by digitalizing of the control circuit of DC-DC converter and speeding up the control circuit. |
| 内容記述 |
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内容記述タイプ |
Other |
|
内容記述 |
INTELEC 2009 - 2009 International Telecommunications Energy Conference : Incheon, South Korea, 2009.10.18-2009.10.22 |
| 書誌情報 |
INTELEC 2009 - 31st International Telecommunications Energy Conference
p. 1-6,
発行日 2009-10
|
| ISSN |
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収録物識別子タイプ |
ISSN |
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収録物識別子 |
02750473 |
| ISBN |
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識別子タイプ |
ISBN |
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関連識別子 |
978-1-4244-2490-0 |
| 書誌レコードID |
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収録物識別子タイプ |
NCID |
|
収録物識別子 |
AA11087061 |
| DOI |
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関連タイプ |
isIdenticalTo |
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識別子タイプ |
DOI |
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関連識別子 |
10.1109/INTLEC.2009.5351914 |
| 権利 |
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権利情報 |
(c)2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. |
| 著者版フラグ |
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出版タイプ |
VoR |
|
出版タイプResource |
http://purl.org/coar/version/c_970fb48d4fbd8a85 |
| 出版者 |
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出版者 |
IEEE |
| 引用 |
|
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内容記述タイプ |
Other |
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内容記述 |
INTELEC 2009, pp.1-6; 2009 |
INTELEC2009_PPC-7.pdf (622.3 kB)
